GIC Distributor 接口 More...

#include <gic.h>

Collaboration diagram for Gic::Gicd:

Classes
struct	GicdCtlr
	GICD_CTLR, Distributor Control Register. More...

struct	GicdIidr
	GICD_IIDR, Distributor Implementer Identification Register. More...

struct	GicdTyper
	GICD_TYPER, Interrupt Controller Type Register. More...

Public Member Functions
auto	Enable (uint32_t intid) const -> void
	允许从 Distributor 转发到 redistributor

auto	EnableGrp1Ns () const -> void
	允许 no-sec group1 中断

auto	Disable (uint32_t intid) const -> void
	禁止从 Distributor 转发到 redistributor

auto	Clear (uint32_t intid) const -> void
	清除 intid 的中断

auto	IsEnable (uint32_t intid) const -> bool
	判断 intid 中断是否使能

auto	SetPrio (uint32_t intid, uint32_t prio) const -> void
	设置 intid 的优先级

auto	SetConfig (uint32_t intid, uint32_t config) const -> void
	设置 intid 的属性

auto	SetTarget (uint32_t intid, uint32_t cpuid) const -> void
	设置 intid 的由指定 cpu 处理

auto	SetupSpi (uint32_t intid, uint32_t cpuid) const -> void
	设置指定 SPI 中断 SPI: shared peripheral interrupt, 共享外设中断，该中断来源于外设，但是该中断可以对所有的 core 有效

构造/析构函数
	Gicd (uint64_t _base_addr)
	构造函数

	Gicd ()=default

	Gicd (const Gicd &)=delete

	Gicd (Gicd &&)=delete

auto	operator= (const Gicd &) -> Gicd &=delete

auto	operator= (Gicd &&) -> Gicd &=default

	~Gicd ()=default

Private Member Functions
__always_inline auto	Igrouprn (uint64_t n) const -> uint64_t
	计算 IGROUPR 寄存器偏移

__always_inline auto	Isenablern (uint64_t n) const -> uint64_t
	计算 ISENABLER 寄存器偏移

__always_inline auto	Icenablern (uint64_t n) const -> uint64_t
	计算 ICENABLER 寄存器偏移

__always_inline auto	Icpendrn (uint64_t n) const -> uint64_t
	计算 ICPENDR 寄存器偏移

__always_inline auto	Ipriorityrn (uint64_t n) const -> uint64_t
	计算 IPRIORITYR 寄存器偏移

__always_inline auto	Itargetsrn (uint64_t n) const -> uint64_t
	计算 ITARGETSR 寄存器偏移

__always_inline auto	Icfgrn (uint64_t n) const -> uint64_t
	计算 ICFGR 寄存器偏移

__always_inline auto	Read (uint32_t off) const -> uint32_t

__always_inline auto	Write (uint32_t off, uint32_t val) const -> void

Private Attributes
uint64_t	base_addr_ {0}
	GICD 基地址

Static Private Attributes
static constexpr uint32_t	kCtlr = 0x0000

static constexpr uint32_t	kCtlrEnableGrp1Ns = 0x2

static constexpr uint32_t	kTyper = 0x0004
	Configuration dependent Interrupt Controller Type Register, RO.

static constexpr uint32_t	kTyperItLinesNumberMask = 0x1F

static constexpr uint32_t	kIidr = 0x0008

static constexpr uint32_t	kFctlr = 0x0020
	Function Control Register, RW.

static constexpr uint32_t	kSac = 0x0024
	Tie-off dependentb Secure Access Control register, RW.

static constexpr uint32_t	kSetSpiNsr = 0x0040
	Non-secure SPI Set Register, WO.

static constexpr uint32_t	kClrSpiNsr = 0x0048
	Non-secure SPI Clear Register, WO.

static constexpr uint32_t	kSetSpiSr = 0x0050
	Secure SPI Set Register, WO.

static constexpr uint32_t	kClrSpiSr = 0x0058
	Secure SPI Clear Register, WO.

static constexpr uint32_t	kIgrouprn = 0x0080

static constexpr uint32_t	kIsEnablern = 0x0100

static constexpr uint32_t	kIsEnablernSize = 32

static constexpr uint32_t	kIcEnablern = 0x0180

static constexpr uint32_t	kIcEnablernSize = 32

static constexpr uint32_t	kIsPendrn = 0x0200
	Interrupt Set-Pending Registers, n = 0-31, but n=0 is Reserved.

static constexpr uint32_t	kIcPendrn = 0x0280

static constexpr uint32_t	kIcPendrnSize = 32

static constexpr uint32_t	kIsActivern = 0x0300
	Interrupt Set-Active Registers, n = 0-31, but n=0 is Reserved.

static constexpr uint32_t	kIcActivern = 0x0380
	Interrupt Clear-Active Registers, n = 0-31, but n=0 is Reserved.

static constexpr uint32_t	kIpriorityrn = 0x0400

static constexpr uint32_t	kIpriorityrnSize = 4

static constexpr uint32_t	kIpriorityrnBits = 8

static constexpr uint32_t	kIpriorityrnBitsMask = 0xFF

static constexpr uint32_t	kItargetsrn = 0x0800

static constexpr uint32_t	kItargetsrnSize = 4

static constexpr uint32_t	kItargetsrnBits = 8

static constexpr uint32_t	kItargetsrnBitsMask = 0xFF

static constexpr uint32_t	kIcfgrn = 0x0C00

static constexpr uint32_t	kIcfgrnSize = 16

static constexpr uint32_t	kIcfgrnBits = 2

static constexpr uint32_t	kIcfgrnBitsMask = 0x3

static constexpr uint32_t	kIcfgrnLevelSensitive = 0

static constexpr uint32_t	kIcfgrnEdgeTriggered = 1

static constexpr uint32_t	kIgrpmodrn = 0x0D00

static constexpr uint32_t	kNsacrn = 0x0E00

static constexpr uint32_t	kIroutern = 0x6000

static constexpr uint32_t	kChipsr = 0xC000
	P-Channel dependent Chip Status Register, RW.

static constexpr uint32_t	kDchipr = 0xC004
	Default Chip Register, RW.

static constexpr uint32_t	kChiprn = 0xC008
	Chip Registers, n = 0-15. Reserved in single-chip configurations.

static constexpr uint32_t	kIclarn = 0xE000
	Interrupt Class Registers, n = 0-63, but n=0-1 are Reserved.

static constexpr uint32_t	kIcerrrn = 0xE100
	Interrupt Clear Error Registers, n = 0-31, but n=0 is Reserved.

static constexpr uint64_t	kCfgid = 0xF000
	Configuration dependent Configuration ID Register, RO.

static constexpr uint32_t	kPidr4 = 0xFFD0
	Peripheral ID4 register , RO.

static constexpr uint32_t	kPidr5 = 0xFFD4
	Peripheral ID 5 Register, RO.

static constexpr uint32_t	kPidr6 = 0xFFD8
	Peripheral ID 6 Register, RO.

static constexpr uint32_t	kPidr7 = 0xFFDC
	Peripheral ID 7 Register, RO.

static constexpr uint32_t	kPidr0 = 0xFFE0
	Peripheral ID0 register, RO.

static constexpr uint32_t	kPidr1 = 0xFFE4
	Peripheral ID1 register, RO.

static constexpr uint32_t	kPidr2 = 0xFFE8
	Peripheral ID2 register, RO.

static constexpr uint32_t	kPidr3 = 0xFFEC
	Peripheral ID3 register, RO.

static constexpr uint32_t	kCidr0 = 0xFFF0
	Component ID 0 Register, RO.

static constexpr uint32_t	kCidr1 = 0xFFF4
	Component ID 1 Register, RO.

static constexpr uint32_t	kCidr2 = 0xFFF8
	Component ID 2 Register, RO.

static constexpr uint32_t	kCidr3 = 0xFFFC
	Component ID 3 Register, RO.

Detailed Description

GIC Distributor 接口

Definition at line 31 of file gic.h.

Constructor & Destructor Documentation

◆ Gicd() [1/4]

Gic::Gicd::Gicd ( uint64_t _base_addr )

explicit

构造函数

Parameters

_base_addr GICD 基地址

Definition at line 43 of file gic.cpp.

                                 : base_addr_(_base_addr) {
  assert(base_addr_ != 0 && "GICD base address is invalid");
 
  // 将 GICD_CTLR 清零
  Write(kCtlr, 0);
 
  // 读取 ITLinesNumber 数量
  auto it_lines_number = Read(kTyper) & kTyperItLinesNumberMask;
 
  klog::Info("it_lines_number {}", it_lines_number);
 
  // 设置中断为 Non-secure Group 1
  for (uint32_t i = 0; i < it_lines_number; i++) {
    Write(Igrouprn(i), UINT32_MAX);
  }
}

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◆ Gicd() [2/4]

Gic::Gicd::Gicd ( )

default

◆ Gicd() [3/4]

Gic::Gicd::Gicd ( const Gicd & )

delete

◆ Gicd() [4/4]

Gic::Gicd::Gicd ( Gicd && )

delete

◆ ~Gicd()

Gic::Gicd::~Gicd ( )

default

Member Function Documentation

◆ Clear()

auto Gic::Gicd::Clear ( uint32_t intid ) const -> void

清除 intid 的中断

Parameters

intid 中断号

Definition at line 77 of file gic.cpp.

                                                {
  auto ic = Read(Icpendrn(intid / kIcPendrnSize));
  ic |= 1 << (intid % kIcPendrnSize);
  Write(Icpendrn(intid / kIcPendrnSize), ic);
}

◆ Disable()

auto Gic::Gicd::Disable ( uint32_t intid ) const -> void

禁止从 Distributor 转发到 redistributor

Parameters

intid 中断号

Definition at line 71 of file gic.cpp.

                                                  {
  auto ic = Read(Icenablern(intid / kIcEnablernSize));
  ic |= 1 << (intid % kIcEnablernSize);
  Write(Icenablern(intid / kIcEnablernSize), ic);
}

◆ Enable()

auto Gic::Gicd::Enable ( uint32_t intid ) const -> void

允许从 Distributor 转发到 redistributor

Parameters

intid 中断号

Definition at line 60 of file gic.cpp.

                                                 {
  auto is = Read(Isenablern(intid / kIsEnablernSize));
  is |= 1 << (intid % kIsEnablernSize);
  Write(Isenablern(intid / kIsEnablernSize), is);
}

◆ EnableGrp1Ns()

auto Gic::Gicd::EnableGrp1Ns ( ) const -> void

允许 no-sec group1 中断

Definition at line 66 of file gic.cpp.

                                         {
  Write(kCtlr, kCtlrEnableGrp1Ns);
  cpu_io::ICC_IGRPEN1_EL1::Enable::Set();
}

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◆ Icenablern()

__always_inline auto Gic::Gicd::Icenablern ( uint64_t n ) const -> uint64_t

inlineprivate

计算 ICENABLER 寄存器偏移

Parameters

n 寄存器索引

Returns: uint64_t 寄存器偏移地址

Definition at line 263 of file gic.h.

                    {
      return kIcEnablern + n * 4;
    }

◆ Icfgrn()

__always_inline auto Gic::Gicd::Icfgrn ( uint64_t n ) const -> uint64_t

inlineprivate

计算 ICFGR 寄存器偏移

Parameters

n 寄存器索引

Returns: uint64_t 寄存器偏移地址

Definition at line 343 of file gic.h.

                                                                            {
      return kIcfgrn + n * 4;
    }

◆ Icpendrn()

__always_inline auto Gic::Gicd::Icpendrn ( uint64_t n ) const -> uint64_t

inlineprivate

计算 ICPENDR 寄存器偏移

Parameters

n 寄存器索引

Returns: uint64_t 寄存器偏移地址

Definition at line 282 of file gic.h.

                                                                              {
      return kIcPendrn + n * 4;
    }

◆ Igrouprn()

__always_inline auto Gic::Gicd::Igrouprn ( uint64_t n ) const -> uint64_t

inlineprivate

计算 IGROUPR 寄存器偏移

Parameters

n 寄存器索引

Returns: uint64_t 寄存器偏移地址

Definition at line 232 of file gic.h.

                                                                              {
      return kIgrouprn + n * 4;
    }

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◆ Ipriorityrn()

__always_inline auto Gic::Gicd::Ipriorityrn ( uint64_t n ) const -> uint64_t

inlineprivate

计算 IPRIORITYR 寄存器偏移

Parameters

n 寄存器索引

Returns: uint64_t 寄存器偏移地址

Definition at line 305 of file gic.h.

                    {
      return kIpriorityrn + n * 4;
    }

◆ IsEnable()

auto Gic::Gicd::IsEnable ( uint32_t intid ) const -> bool

判断 intid 中断是否使能

Parameters

intid 中断号

Returns: true 允许; false 未使能

Definition at line 83 of file gic.cpp.

                                                   {
  auto is = Read(Isenablern(intid / kIsEnablernSize));
  return is & (1 << (intid % kIsEnablernSize));
}

◆ Isenablern()

__always_inline auto Gic::Gicd::Isenablern ( uint64_t n ) const -> uint64_t

inlineprivate

计算 ISENABLER 寄存器偏移

Parameters

n 寄存器索引

Returns: uint64_t 寄存器偏移地址

Definition at line 247 of file gic.h.

                    {
      return kIsEnablern + n * 4;
    }

◆ Itargetsrn()

__always_inline auto Gic::Gicd::Itargetsrn ( uint64_t n ) const -> uint64_t

inlineprivate

计算 ITARGETSR 寄存器偏移

Parameters

n 寄存器索引

Returns: uint64_t 寄存器偏移地址

Definition at line 323 of file gic.h.

                    {
      return kItargetsrn + n * 4;
    }

◆ operator=() [1/2]

auto Gic::Gicd::operator= ( const Gicd & ) -> Gicd &=delete

delete

◆ operator=() [2/2]

auto Gic::Gicd::operator= ( Gicd && ) -> Gicd &=default

default

◆ Read()

__always_inline auto Gic::Gicd::Read ( uint32_t off ) const -> uint32_t

inlineprivate

Definition at line 396 of file gic.h.

                                                                            {
      etl::io_port_ro<uint32_t> reg{reinterpret_cast<void*>(base_addr_ + off)};
      return reg.read();
    }

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◆ SetConfig()

auto Gic::Gicd::SetConfig	(	uint32_t	intid,
		uint32_t	config
	)		const -> void

设置 intid 的属性

Parameters

intid	中断号
config	属性

Definition at line 96 of file gic.cpp.

                                                                     {
  auto shift = (intid % kIcfgrnSize) * kIcfgrnBits;
  auto ic = Read(Icfgrn(intid / kIcfgrnSize));
  ic &= ~(kIcfgrnBitsMask << shift);
  ic |= config << shift;
  Write(Icfgrn(intid / kIcfgrnSize), ic);
}

◆ SetPrio()

auto Gic::Gicd::SetPrio	(	uint32_t	intid,
		uint32_t	prio
	)		const -> void

设置 intid 的优先级

Parameters

intid	中断号
prio	优先级

Definition at line 88 of file gic.cpp.

                                                                 {
  auto shift = (intid % kIpriorityrnSize) * kIpriorityrnBits;
  auto ip = Read(Ipriorityrn(intid / kIpriorityrnSize));
  ip &= ~(kIpriorityrnBitsMask << shift);
  ip |= prio << shift;
  Write(Ipriorityrn(intid / kIpriorityrnSize), ip);
}

◆ SetTarget()

auto Gic::Gicd::SetTarget	(	uint32_t	intid,
		uint32_t	cpuid
	)		const -> void

设置 intid 的由指定 cpu 处理

Parameters

intid	中断号
cpuid	cpu 编号

Definition at line 104 of file gic.cpp.

                                                                    {
  auto target = Read(Itargetsrn(intid / kItargetsrnSize));
  target &= ~(kIcfgrnBitsMask << ((intid % kItargetsrnSize) * kItargetsrnBits));
  Write(
      Itargetsrn(intid / kItargetsrnSize),
      target | ((1 << cpuid) << ((intid % kItargetsrnSize) * kItargetsrnBits)));
}

◆ SetupSpi()

auto Gic::Gicd::SetupSpi	(	uint32_t	intid,
		uint32_t	cpuid
	)		const -> void

设置指定 SPI 中断 SPI: shared peripheral interrupt, 共享外设中断，该中断来源于外设，但是该中断可以对所有的 core 有效

Parameters

intid	中断号
cpuid	cpu 编号

Definition at line 137 of file gic.cpp.

                                                                   {
  // 电平触发
  SetConfig(intid, kIcfgrnLevelSensitive);
 
  // 优先级设定
  SetPrio(intid, 0);
 
  // 设置所有中断由 cpu0 处理
  SetTarget(intid, cpuid);
  // 清除中断请求
  Clear(intid);
  // 使能中断
  Enable(intid);
}

◆ Write()

__always_inline auto Gic::Gicd::Write	(	uint32_t	off,
		uint32_t	val
	)		const -> void

inlineprivate

Definition at line 401 of file gic.h.

                                                                         {
      etl::io_port_wo<uint32_t> reg{reinterpret_cast<void*>(base_addr_ + off)};
      reg.write(val);
    }

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Member Data Documentation

◆ base_addr_

uint64_t Gic::Gicd::base_addr_ {0}

private

GICD 基地址

Definition at line 394 of file gic.h.

394{0};

◆ kCfgid

constexpr uint64_t Gic::Gicd::kCfgid = 0xF000

staticconstexprprivate

Configuration dependent Configuration ID Register, RO.

Definition at line 367 of file gic.h.

◆ kChiprn

constexpr uint32_t Gic::Gicd::kChiprn = 0xC008

staticconstexprprivate

Chip Registers, n = 0-15. Reserved in single-chip configurations.

Definition at line 361 of file gic.h.

◆ kChipsr

constexpr uint32_t Gic::Gicd::kChipsr = 0xC000

staticconstexprprivate

P-Channel dependent Chip Status Register, RW.

Definition at line 357 of file gic.h.

◆ kCidr0

constexpr uint32_t Gic::Gicd::kCidr0 = 0xFFF0

staticconstexprprivate

Component ID 0 Register, RO.

Definition at line 385 of file gic.h.

◆ kCidr1

constexpr uint32_t Gic::Gicd::kCidr1 = 0xFFF4

staticconstexprprivate

Component ID 1 Register, RO.

Definition at line 387 of file gic.h.

◆ kCidr2

constexpr uint32_t Gic::Gicd::kCidr2 = 0xFFF8

staticconstexprprivate

Component ID 2 Register, RO.

Definition at line 389 of file gic.h.

◆ kCidr3

constexpr uint32_t Gic::Gicd::kCidr3 = 0xFFFC

staticconstexprprivate

Component ID 3 Register, RO.

Definition at line 391 of file gic.h.

◆ kClrSpiNsr

constexpr uint32_t Gic::Gicd::kClrSpiNsr = 0x0048

staticconstexprprivate

Non-secure SPI Clear Register, WO.

Definition at line 216 of file gic.h.

◆ kClrSpiSr

constexpr uint32_t Gic::Gicd::kClrSpiSr = 0x0058

staticconstexprprivate

Secure SPI Clear Register, WO.

Definition at line 220 of file gic.h.

◆ kCtlr

constexpr uint32_t Gic::Gicd::kCtlr = 0x0000

staticconstexprprivate

See also: https://developer.arm.com/documentation/101206/0003/Programmers-model/Distributor-registers–GICD-GICDA–summary GICD Register offsets Configuration dependent Distributor Control Register, RW

Definition at line 115 of file gic.h.

◆ kCtlrEnableGrp1Ns

constexpr uint32_t Gic::Gicd::kCtlrEnableGrp1Ns = 0x2

staticconstexprprivate

Definition at line 116 of file gic.h.

◆ kDchipr

constexpr uint32_t Gic::Gicd::kDchipr = 0xC004

staticconstexprprivate

Default Chip Register, RW.

Definition at line 359 of file gic.h.

◆ kFctlr

constexpr uint32_t Gic::Gicd::kFctlr = 0x0020

staticconstexprprivate

Function Control Register, RW.

Definition at line 210 of file gic.h.

◆ kIcActivern

constexpr uint32_t Gic::Gicd::kIcActivern = 0x0380

staticconstexprprivate

Interrupt Clear-Active Registers, n = 0-31, but n=0 is Reserved.

Definition at line 289 of file gic.h.

◆ kIcEnablern

constexpr uint32_t Gic::Gicd::kIcEnablern = 0x0180

staticconstexprprivate

Interrupt Clear-Enable Registers, n = 0-31, but n=0 is Reserved

See also: https://developer.arm.com/documentation/ddi0601/2024-12/External-Registers/GICD-ICENABLER-n—Interrupt-Clear-Enable-Registers?lang=en

Definition at line 255 of file gic.h.

◆ kIcEnablernSize

constexpr uint32_t Gic::Gicd::kIcEnablernSize = 32

staticconstexprprivate

Definition at line 256 of file gic.h.

◆ kIcerrrn

constexpr uint32_t Gic::Gicd::kIcerrrn = 0xE100

staticconstexprprivate

Interrupt Clear Error Registers, n = 0-31, but n=0 is Reserved.

Definition at line 365 of file gic.h.

◆ kIcfgrn

constexpr uint32_t Gic::Gicd::kIcfgrn = 0x0C00

staticconstexprprivate

Interrupt Configuration Registers, n = 0-63, but n=0-1 are Reserved

See also: https://developer.arm.com/documentation/ddi0601/2024-12/External-Registers/GICD-ICFGR-n—Interrupt-Configuration-Registers?lang=en

Definition at line 331 of file gic.h.

◆ kIcfgrnBits

constexpr uint32_t Gic::Gicd::kIcfgrnBits = 2

staticconstexprprivate

Definition at line 333 of file gic.h.

◆ kIcfgrnBitsMask

constexpr uint32_t Gic::Gicd::kIcfgrnBitsMask = 0x3

staticconstexprprivate

Definition at line 334 of file gic.h.

◆ kIcfgrnEdgeTriggered

constexpr uint32_t Gic::Gicd::kIcfgrnEdgeTriggered = 1

staticconstexprprivate

Definition at line 336 of file gic.h.

◆ kIcfgrnLevelSensitive

constexpr uint32_t Gic::Gicd::kIcfgrnLevelSensitive = 0

staticconstexprprivate

Definition at line 335 of file gic.h.

◆ kIcfgrnSize

constexpr uint32_t Gic::Gicd::kIcfgrnSize = 16

staticconstexprprivate

Definition at line 332 of file gic.h.

◆ kIclarn

constexpr uint32_t Gic::Gicd::kIclarn = 0xE000

staticconstexprprivate

Interrupt Class Registers, n = 0-63, but n=0-1 are Reserved.

Definition at line 363 of file gic.h.

◆ kIcPendrn

constexpr uint32_t Gic::Gicd::kIcPendrn = 0x0280

staticconstexprprivate

Interrupt Clear-Pending Registers, n = 0-31, but n=0 is Reserved

See also: https://developer.arm.com/documentation/ddi0601/2024-12/External-Registers/GICD-ICPENDR-n—Interrupt-Clear-Pending-Registers?lang=en

Definition at line 274 of file gic.h.

◆ kIcPendrnSize

constexpr uint32_t Gic::Gicd::kIcPendrnSize = 32

staticconstexprprivate

Definition at line 275 of file gic.h.

◆ kIgrouprn

constexpr uint32_t Gic::Gicd::kIgrouprn = 0x0080

staticconstexprprivate

Interrupt Group Registers, n = 0-31, but n=0 is Reserved

See also: https://developer.arm.com/documentation/ddi0601/2024-12/External-Registers/GICD-IGROUPR-n—Interrupt-Group-Registers?lang=en

Definition at line 225 of file gic.h.

◆ kIgrpmodrn

constexpr uint32_t Gic::Gicd::kIgrpmodrn = 0x0D00

staticconstexprprivate

Interrupt Group Modifier Registers, n = 0-31, but n=0 is Reserved. If GICD_CTLR.DS == 1, then this register is RAZ/WI.

Definition at line 349 of file gic.h.

◆ kIidr

constexpr uint32_t Gic::Gicd::kIidr = 0x0008

staticconstexprprivate

Configuration dependent Distributor Implementer Identification Register, RO

Definition at line 186 of file gic.h.

◆ kIpriorityrn

constexpr uint32_t Gic::Gicd::kIpriorityrn = 0x0400

staticconstexprprivate

Interrupt Priority Registers, n = 0-255, but n=0-7 are Reserved when affinity routing is enabled

See also: https://developer.arm.com/documentation/ddi0601/2024-12/External-Registers/GICD-IPRIORITYR-n—Interrupt-Priority-Registers?lang=en

Definition at line 295 of file gic.h.

◆ kIpriorityrnBits

constexpr uint32_t Gic::Gicd::kIpriorityrnBits = 8

staticconstexprprivate

Definition at line 297 of file gic.h.

◆ kIpriorityrnBitsMask

constexpr uint32_t Gic::Gicd::kIpriorityrnBitsMask = 0xFF

staticconstexprprivate

Definition at line 298 of file gic.h.

◆ kIpriorityrnSize

constexpr uint32_t Gic::Gicd::kIpriorityrnSize = 4

staticconstexprprivate

Definition at line 296 of file gic.h.

◆ kIroutern

constexpr uint32_t Gic::Gicd::kIroutern = 0x6000

staticconstexprprivate

Interrupt Routing Registers, n = 0-991, but n=0-31 are Reserved when affinity routing is enabled.

Definition at line 355 of file gic.h.

◆ kIsActivern

constexpr uint32_t Gic::Gicd::kIsActivern = 0x0300

staticconstexprprivate

Interrupt Set-Active Registers, n = 0-31, but n=0 is Reserved.

Definition at line 287 of file gic.h.

◆ kIsEnablern

constexpr uint32_t Gic::Gicd::kIsEnablern = 0x0100

staticconstexprprivate

Interrupt Set-Enable Registers, n = 0-31, but n=0 is Reserved

See also: https://developer.arm.com/documentation/ddi0601/2024-12/External-Registers/GICD-ISENABLER-n—Interrupt-Set-Enable-Registers?lang=en

Definition at line 239 of file gic.h.

◆ kIsEnablernSize

constexpr uint32_t Gic::Gicd::kIsEnablernSize = 32

staticconstexprprivate

Definition at line 240 of file gic.h.

◆ kIsPendrn

constexpr uint32_t Gic::Gicd::kIsPendrn = 0x0200

staticconstexprprivate

Interrupt Set-Pending Registers, n = 0-31, but n=0 is Reserved.

Definition at line 269 of file gic.h.

◆ kItargetsrn

constexpr uint32_t Gic::Gicd::kItargetsrn = 0x0800

staticconstexprprivate

Interrupt Processor Targets Registers, n = 0 - 254

See also: https://developer.arm.com/documentation/ddi0601/2024-12/External-Registers/GICD-ITARGETSR-n—Interrupt-Processor-Targets-Registers?lang=en

Definition at line 313 of file gic.h.

◆ kItargetsrnBits

constexpr uint32_t Gic::Gicd::kItargetsrnBits = 8

staticconstexprprivate

Definition at line 315 of file gic.h.

◆ kItargetsrnBitsMask

constexpr uint32_t Gic::Gicd::kItargetsrnBitsMask = 0xFF

staticconstexprprivate

Definition at line 316 of file gic.h.

◆ kItargetsrnSize

constexpr uint32_t Gic::Gicd::kItargetsrnSize = 4

staticconstexprprivate

Definition at line 314 of file gic.h.

◆ kNsacrn

constexpr uint32_t Gic::Gicd::kNsacrn = 0x0E00

staticconstexprprivate

Non-secure Access Control Registers, n = 0-63, but n=0-1 are Reserved when affinity routing is enabled

Definition at line 352 of file gic.h.

◆ kPidr0

constexpr uint32_t Gic::Gicd::kPidr0 = 0xFFE0

staticconstexprprivate

Peripheral ID0 register, RO.

Definition at line 377 of file gic.h.

◆ kPidr1

constexpr uint32_t Gic::Gicd::kPidr1 = 0xFFE4

staticconstexprprivate

Peripheral ID1 register, RO.

Definition at line 379 of file gic.h.

◆ kPidr2

constexpr uint32_t Gic::Gicd::kPidr2 = 0xFFE8

staticconstexprprivate

Peripheral ID2 register, RO.

Definition at line 381 of file gic.h.

◆ kPidr3

constexpr uint32_t Gic::Gicd::kPidr3 = 0xFFEC

staticconstexprprivate

Peripheral ID3 register, RO.

Definition at line 383 of file gic.h.

◆ kPidr4

constexpr uint32_t Gic::Gicd::kPidr4 = 0xFFD0

staticconstexprprivate

Peripheral ID4 register , RO.

Definition at line 369 of file gic.h.

◆ kPidr5

constexpr uint32_t Gic::Gicd::kPidr5 = 0xFFD4

staticconstexprprivate

Peripheral ID 5 Register, RO.

Definition at line 371 of file gic.h.

◆ kPidr6

constexpr uint32_t Gic::Gicd::kPidr6 = 0xFFD8

staticconstexprprivate

Peripheral ID 6 Register, RO.

Definition at line 373 of file gic.h.

◆ kPidr7

constexpr uint32_t Gic::Gicd::kPidr7 = 0xFFDC

staticconstexprprivate

Peripheral ID 7 Register, RO.

Definition at line 375 of file gic.h.

◆ kSac

constexpr uint32_t Gic::Gicd::kSac = 0x0024

staticconstexprprivate

Tie-off dependentb Secure Access Control register, RW.

Definition at line 212 of file gic.h.

◆ kSetSpiNsr

constexpr uint32_t Gic::Gicd::kSetSpiNsr = 0x0040

staticconstexprprivate

Non-secure SPI Set Register, WO.

Definition at line 214 of file gic.h.

◆ kSetSpiSr

constexpr uint32_t Gic::Gicd::kSetSpiSr = 0x0050

staticconstexprprivate

Secure SPI Set Register, WO.

Definition at line 218 of file gic.h.

◆ kTyper

constexpr uint32_t Gic::Gicd::kTyper = 0x0004

staticconstexprprivate

Configuration dependent Interrupt Controller Type Register, RO.

Definition at line 145 of file gic.h.

◆ kTyperItLinesNumberMask

constexpr uint32_t Gic::Gicd::kTyperItLinesNumberMask = 0x1F

staticconstexprprivate

Definition at line 146 of file gic.h.

The documentation for this class was generated from the following files:

/workspaces/SimpleKernel/src/arch/aarch64/gic/include/gic.h
/workspaces/SimpleKernel/src/arch/aarch64/gic/gic.cpp

Classes

Public Member Functions

Private Member Functions

Private Attributes

Static Private Attributes

Detailed Description

Constructor & Destructor Documentation

◆ Gicd() [1/4]

◆ Gicd() [2/4]

◆ Gicd() [3/4]

◆ Gicd() [4/4]

◆ ~Gicd()

Member Function Documentation

◆ Clear()

◆ Disable()

◆ Enable()

◆ EnableGrp1Ns()

◆ Icenablern()

◆ Icfgrn()

◆ Icpendrn()

◆ Igrouprn()

◆ Ipriorityrn()

◆ IsEnable()

◆ Isenablern()

◆ Itargetsrn()

◆ operator=() [1/2]

◆ operator=() [2/2]

◆ Read()

◆ SetConfig()

◆ SetPrio()

◆ SetTarget()

◆ SetupSpi()

◆ Write()

Member Data Documentation

◆ base_addr_

◆ kCfgid

◆ kChiprn

◆ kChipsr

◆ kCidr0

◆ kCidr1

◆ kCidr2

◆ kCidr3

◆ kClrSpiNsr

◆ kClrSpiSr

◆ kCtlr

◆ kCtlrEnableGrp1Ns

◆ kDchipr

◆ kFctlr

◆ kIcActivern

◆ kIcEnablern

◆ kIcEnablernSize

◆ kIcerrrn

◆ kIcfgrn

◆ kIcfgrnBits

◆ kIcfgrnBitsMask

◆ kIcfgrnEdgeTriggered

◆ kIcfgrnLevelSensitive

◆ kIcfgrnSize

◆ kIclarn

◆ kIcPendrn

◆ kIcPendrnSize

◆ kIgrouprn

◆ kIgrpmodrn

◆ kIidr

◆ kIpriorityrn

◆ kIpriorityrnBits

◆ kIpriorityrnBitsMask

◆ kIpriorityrnSize

◆ kIroutern

◆ kIsActivern

◆ kIsEnablern

◆ kIsEnablernSize

◆ kIsPendrn

◆ kItargetsrn

◆ kItargetsrnBits

◆ kItargetsrnBitsMask

◆ kItargetsrnSize

◆ kNsacrn

◆ kPidr0

◆ kPidr1