SimpleKernel 1.17.0
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Public Attributes | List of all members
Gic::Gicd::GicdCtlr Struct Reference

GICD_CTLR, Distributor Control Register. More...

Collaboration diagram for Gic::Gicd::GicdCtlr:
Collaboration graph

Public Attributes

uint32_t rwp: 1
 [31] Register Write Pending
 
uint32_t reserved1: 23
 
uint32_t e1nwf: 1
 [7] E1NWF Enable 1 of N Wakeup Functionality
 
uint32_t ds: 1
 [6] DS Disable Security
 
uint32_t are_ns: 1
 [5] ARE_NS Affinity Routing Enable, Non-secure state
 
uint32_t are_s: 1
 [4] ARE_S Affinity Routing Enable, Secure state
 
uint32_t reserved0: 1
 
uint32_t enable_grp1_s: 1
 [2] EnableGrp1S Enable Secure Group 1 interrupts
 
uint32_t enable_grp1_ns: 1
 [1] EnableGrp1NS Enable Non-secure Group 1 interrupts
 
uint32_t enable_grp0: 1
 [0] EnableGrp0 Enable Group 0 interrupts
 

Detailed Description

GICD_CTLR, Distributor Control Register.

See also
https://developer.arm.com/documentation/101206/0003/Programmers-model/Distributor-registers–GICD-GICDA–summary/GICD-CTLR–Distributor-Control-Register?lang=en

Definition at line 123 of file gic.h.

Member Data Documentation

◆ are_ns

uint32_t Gic::Gicd::GicdCtlr::are_ns

[5] ARE_NS Affinity Routing Enable, Non-secure state

Definition at line 132 of file gic.h.

◆ are_s

uint32_t Gic::Gicd::GicdCtlr::are_s

[4] ARE_S Affinity Routing Enable, Secure state

Definition at line 134 of file gic.h.

◆ ds

uint32_t Gic::Gicd::GicdCtlr::ds

[6] DS Disable Security

Definition at line 130 of file gic.h.

◆ e1nwf

uint32_t Gic::Gicd::GicdCtlr::e1nwf

[7] E1NWF Enable 1 of N Wakeup Functionality

Definition at line 128 of file gic.h.

◆ enable_grp0

uint32_t Gic::Gicd::GicdCtlr::enable_grp0

[0] EnableGrp0 Enable Group 0 interrupts

Definition at line 141 of file gic.h.

◆ enable_grp1_ns

uint32_t Gic::Gicd::GicdCtlr::enable_grp1_ns

[1] EnableGrp1NS Enable Non-secure Group 1 interrupts

Definition at line 139 of file gic.h.

◆ enable_grp1_s

uint32_t Gic::Gicd::GicdCtlr::enable_grp1_s

[2] EnableGrp1S Enable Secure Group 1 interrupts

Definition at line 137 of file gic.h.

◆ reserved0

uint32_t Gic::Gicd::GicdCtlr::reserved0

Definition at line 135 of file gic.h.

◆ reserved1

uint32_t Gic::Gicd::GicdCtlr::reserved1

Definition at line 126 of file gic.h.

◆ rwp

uint32_t Gic::Gicd::GicdCtlr::rwp

[31] Register Write Pending

Definition at line 125 of file gic.h.

The documentation for this struct was generated from the following file: